1. Field of the Invention
The present invention relates to the field of microelectronics, and more particularly, to a manufacturing process for fabricating isolation regions in a highly integrated semiconductor device.
2. Description of the Related Art
In general, semiconductor devices include an isolation region for electrically isolating active regions. The isolation region influences the size of the active region and process margins of a subsequent process because it is typically formed at the beginning of the semiconductor fabrication process. Accordingly, as the semiconductor circuit becomes finer and more highly integrated, a reduction in the size of the isolation region as well as each device becomes more important.
U.S. Pat. No. 5,385,861 discloses a device isolation method, applicable to highly-integrated semiconductor devices, which combines a local oxidation of silicon (LOCOS) technique and a trench isolation technique. According to this method, the inside of the trench is filled with a polysilicon layer, and then a usual LOCOS technique is performed to form an isolation region.
Also, a method of combining a selective polysilicon oxidation (SEPOX) technique and a trench isolation technique is disclosed in "Deep Trench Well Isolation for 256 kB 6T CMOS Static RAM", VLSI 85, by Kazuhito Hashimoto. According to this method, the inside of the trench is filled with a polysilicon layer, and then a pad oxide layer and a polysilicon layer are sequentially formed on the entire surface of a substrate. Then, the polysilicon layer on the substrate is oxidized to form an isolation region.
However, the combination method of the LOCOS with the trench isolation still has problems. The active region is reduced by bird's beak formation which is not entirely avoidable in the LOCOS process. Another problem is that crystal defects can occur in an interface between the trench oxide and the silicon substrate due to stress caused by lattice mismatch and a difference of thermal expansion coefficients between the silicon substrate and a silicon oxide layer during oxidation of the polysilicon filled in the trench. The crystal defect can increase leakage current of a transistor.
Problems due to such crystal defects are also found in the combination method of the SEPOX with the trench isolation, although the extent is lessen more on less. Also, the processing method is more complicated than that of LOCOS, because SEPOX use added process steps such as deposition and removing the polysilicon layer.
Accordingly a need remains for an isolation method which reduces leakage current.